On this course you will learn to use truth tables, Karnaugh maps and DeMorgan's theorems to produce the most economic design to meet the application requirements. You will use computer software to simulate and test your design solution for functional accuracy. By the end of the unit you will be expected to design and construct circuits which meet stated design requirements using the minimum number of devices, and will be able to check, using logic measuring equipment, that circuits meet the design brief.
It is recommended that the assessment for all four outcomes in this unit are combined into one assessment paper and a practical exercise. The final assessment will take the form of a written test paper lasting two hours, which will be taken under supervised, controlled closed book conditions. You will not be allowed to take notes, textbooks into the assessment. You will however have access to device data sheets. The practical exercise will allow you to show evidence of your practical expertise. There will be a design and construct exercise where you will be expected to design and build a circuit to perform a specified function. This is likely to be conducted in a laboratory at a different time from the written assessment, and will last no more than three hours.
Candidates should have a basic knowledge of digital electronic engineering. This may be evidenced by the possession of Higher Electronics, National 5 Electronic and Electrical Fundamentals or the following National Qualification Units:
E9S3 04 Combinational Logic; E9SB 12 Logic Families and Digital System Analysis
Distance and Flexible learning